The present invention relates to a computer system having several interconnected processors each associated with a memory, the memories all having a common storage area to which the processors have access.
In computer systems having several processors, which, for example, communicate with one another via a bus and jointly execute different tasks, it is necessary to synchronize the processing. This means that a change of a processor state of operation to another state of operation and/or the execution of system jobs or rather user jobs by the processors must be handled in a synchronous manner.
DE-OS 39 11 407 discloses a redundant computer system having several processors each associated with a memory. In each memory, a storage area is associated with each computer into which storage area the relevant computer enters data. Each computer reads out the data from its associated memory areas and supplies the data it reads out to a voter which performs a voter-based evaluation and reports any possible deviation in the supplied data as an error. During normal operation, the same data are present nine times and the lines to the memory units must be laid out three times.